Careers

Sr. Principal FPGA or ASIC Design Engineer

  • Northrop Grumman
  • Melbourne, FL, USA
  • Nov 09, 2020

Job Description

At the heart of Defining Possible is our commitment to missions. In rapidly changing global security environments, Northrop Grumman brings informed insights and software-secure technology to enable strategic planning. We're looking for innovators who can help us keep building on our wide portfolio of secure, affordable, integrated, and multi-domain systems and technologies that fuel those missions. By joining in our shared mission, we'll support yours of expanding your personal network and developing skills, whether you are new to the field or an industry thought-leader. At Northrop Grumman, you'll have the resources, support, and team to do some of the best work of your career. Northrop Grumman Mission Systems (NGMS) is a leading global provider of secure software-defined, hardware enabled mission systems. Our company is pioneering capabilities in a wide variety of sectors that keep our nation and our allies safe from Undersea to Space and Cyberspace. Northrop Grumman Electronic Mission Systems Sector, Digital Technology Group, is seeking a Sr. Principal Digital Electronic Engineer to work on FPGA or ASIC Design across the full product life cycle process. In this capacity, you will utilize your working knowledge of digital signal processing and digital interfaces. Qualifications Basic Qualifications for Sr. Principal FPGA or ASIC Design Engineer - BS in Electrical Engineering or comparable engineering discipline - 9+ years of digital design engineering experience (7+ years with an MS, 4 years with a PhD) - Advanced knowledge of SystemVerilog, Verilog andor VHDL - Extensive experience with requirements, design, implementation and test of FPGAs andor ASICs - ship with the ability to obtain and maintain Secret Security Clearance Preferred Qualifications - MS in Electrical Engineering or comparable engineering discipline - Experience with industry standard FPGA design implementation tools for IP integration, PnR, CDC - Experience with industry standard ASIC front-end design tools for synthesis, LEC, CDC - Experience with STA constraints generation and timing closure - Experience leading ASIC andor FPGA designs - Knowledge of industry standard bus or IO interfaces - Experience with SystemVerilog Assertions (SVA) - Experience with scripting languages (Bash, Perl, Python, Tcl, Makefile) - Knowledge of digital signal processing - Active Secret Clearance or higher Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal OpportunityAffirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEOAA and Pay Transparency statement, please visit www.northropgrumman.comEEO. U.S. Citizenship is required for most positions.
Associated topics: cad, chip, design, engg, engineer i, engineer ii, engineer iv, hardware designer, layout, systems engineer